Architecture of FPGA Embedded Multiprocessor Programmable Controller
Z. Hajduk, Bartosz Trybuś, Jan Sadolewski · IEEE Transactions on Industrial Electronics · 2014
This paper presents the design and implementation of a multiprocessor programmable controller in field-programmable gate array (FPGA). The novelty of the proposed solution is that it combines two approaches used so far in the domain of FPGA implementations of control algorithms, i.e., program based and hardware coded, and applies multiple processors in a single FPGA chip. The controller is programmed according to the IEC 61131-3 standard and runs control tasks in parallel. Performance tests of the prototype show that it is able to execute control programs significantly faster than industrial programmable logic controllers.