EFFICIENT DESIGN OF BINARY TO RNS CONVERTERS
P. V. Ananda Mohan · Journal of Circuits Systems and Computers · 1999
In this paper, the choice of composite moduli for realising a large dynamic range RNS is considered. The objective is to reduce the hardware as well as conversion time for Binary to RNS conversion. The proposed designs use two stages of conversion, the first using Periodicity properties of 2x mod mi and second using Binary to RNS conversion architectures proposed in literature due to Alia–Martinelli,1 Capocelli–Giancarlo2 and Stouraits et al.7 Detailed comparison regarding the area requirements and conversion time are presented. The proposed architectures do not need any ROMs for binary to RNS conversion. The results have been extended to the case of even moduli as well due to the recent interest in using one even modulus in certain RNSs.