Synthesizing circuits with implicit stability constraints
H. Cox · IEEE Design & Test of Computers · 1995
Test synthesis constraints embody conditions that a circuit must meet to be fully testable. Algorithms similar to those of automatic test pattern generation transform the circuit and repair rule violations corresponding to the constraints. This form of test synthesis occurs early in the design process; allowing effective investigation of performance and area trade-offs. A prototype implementation indicted that test logic inserted in this way creates little performance or area overhead.>