An Experimental Analog VLSI Neural Chip with On-Chip Back-Propagation Learning

Maurizio Valle, Daniele D. Caviglia, Giacomo Mario Bisio · 1992

An experimental analog VLSI neural chip is presented. The chip integrates 4 neurons and 32 synapses organized in a Single Layer Perceptron architecture with 8 inputs and 4 outputs. The neural computational units (neurons and synapses) feature on-chip learning capabilities following the Back-Propagation algorithm. The operation of the neural circuitry is fully analog. The chip has been fabricated through EUROCHIP using the standard ES2 1.5 μm CMOS N-well technology.

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