Reconfigurable ATM transmitter/receiver implementation
C. Gupta, Joseph Evans, Gary J. Minden · Electronics Letters · 1993
An architecture to perform the principal transmit and receive functions in an ATM network is presented. This innovative design, based on field programmable gate arrays, can be reconfigured to function as a single 622Mbit/s OC-12c channel or four independent 155Mbit/s OC-3c channels.