Electronically programmable test points for on-chip analog/digital measurements
M. Franco, J. Guiza, E. Chiappetta, Sebastián Rueda, H. Luis, Jose E. Bertuzzo, J. Koeppe, T. Robins, J. Jenkins, Tara Julia Hamilton · 2013
This paper presents a flexible solution for performing measurements of internal chip signals at the bench, which reduces overall system costs and test risks. It also makes available a way to insert signals at predefined nodes and to bring the system to a specified state. For this purpose, we use a Serial-to-Parallel Interface (SPI) block with a simple communication protocol, which enables the designer to reconfigure as many internal test structures as desired, as well as to drive different internal signals to or from the chip pads. As these pads are reconfigurable, their number can be reduced to a minimum, which in turn reduces silicon area and die cost. The need to use physically intrusive micro probes is reduced and, most importantly, it allows the possibility to acquire internal signals of fully encapsulated dies.