A 28nm programmable and low power ultra-HD video codec engine
Hetul Sanghvi, Mihir Mody, Niraj Nandan, Mahesh M. Mehendale, Subrangshu Das, Dipan Kumar Mandal, Pavan Shastry · 2014
Video codec standards like H.264 and HEVC are driving the need for high computation and high memory bandwidth in current SOCs. On the other hand, portable devices like smartphones and tablets are driving the need to reduce power consumption for enhanced battery life. In this paper, we present a scalable H.264 Ultra-HD video codec engine that dissipates 9 mW of decode and 18 mW of encode power (for a typical HP H.264 1080p30 bit-stream) in 28 nm low power process technology node using various low power optimization techniques across architecture, design, circuit, software and systems.