Multiplierless Polynomial-Operator-Based IR Filters for Efficient VLSI Implementation
Chi‐Un Lei, Ngai Wong · 2006
An improved multiplierless digital filter in transposed direct form II (DFIIt) structure is proposed for efficient VLSI implementation. The traditional delay operator is replaced with standardized polynomial operator. Coefficient scaling is implemented using canonical signed digit (CSD) and subexpression sharing. The proposed structure minimizes roundoff noise gain and further reduces hardware complexity