Exploring metrics tradeoffs in a multithreading extensible processor
Filipe Salgado, Paulo Garcia, Tiago Gomes, Jorge Cabral, Joao L. Monteiro, Adriano Tavares, Mongkol Ekpanyapong · 2012
State of the art FPGAs allow the implementation of small to medium sized Systems-on-Chip (SoCs) where configurability is key in order to achieve design goals. Thus, SoCs are frequently designed around soft extensible processors, which provide a tradeoff between design flexibility and fast time to market. This paper presents the impact of micro-architectural features on several design metrics of a multithreading extensible processor. Using the MiBench benchmark, it is shown how Custom Computational Units (CCUs) can significantly increase performance while providing lower power solutions than software-only implementations. An efficient architecture that facilitates the insertion of CCUs is described and the effect of multithreading and thread scheduling policies on the design metrics is also demonstrated. Results show that multithreading policies can have positive impact on key parameters (e.g., up to 20% increase on performance and up to 10% energy savings in the given application), depending on application characteristics as well as micro-architectural features.