Highly scalable NAND flash memory with robust immunity to program disturbance using symmetric inversion-type source and drain structure
Chang Hyun Lee, Jungdal Choi, Young‐Woo Park, Changseok Kang, Byeong-In Choi, Hyunjae Kim, Hyunsil Oh, Won-Seong Lee · 2008
The symmetric inversion-type S/D structure has been employed for achieving available program disturbance for scaled NAND flash memory beyond sub-40 nm node. The inversion S/D structure enables the channel doping to be reduced due to non-existence of n-lateral diffusion and it suppresses charge sharing between program-inhibit channels, resulting in superior program disturbance. Moreover, the cells show better current drivability in the technology node less than 50 nm by more successful working of gate fringing field with smaller word-line gap, compared to those with the n-diffused S/D junction.