Unified Matrix Processor Design for FCT-IV and FST-IV Hartley Based Transforms
Qadri J. Hamarsheh · 2006
A new unified fast shifted cosine and sine transform matrix processor based on fast Hartley transform is presented and described. It is also shown that the decimation-in-frequency (DIF) FCT-IV and FST-IV can be computed using the same building blocks which are used for computing decimation-in-time FCT-IV and FST-IV. A unified fast shifted cosine and sine transform matrix processor can be designed to compute either the DCT-IV or DST-IV