A hardware-software co-design for a real-time spectral subtraction based noise cancellation system
Trio Adiono, Ardimas Andi Purwita, Ricky Haryadi, Rella Mareta, Eka Rakhman Priandana · 2013
In this paper, we propose a hardware-software co-design solution for a real-time noise cancelling algorithm using spectral subtraction algorithm. The hardware and software are partitioned based on the logic size and the speed performance. Considering the speed, hanning windowing filter and 64-point I/FFT are implemented in a dedicated hardware modules. Due to design complexity and size optimization, noise spectral estimator and spectral subtraction algorithm are implemented in a host processor using software. We utilize SPARC-V8 based LEON3 processor as a host processor. In order to increase the speed of software processing, we use FPU as a floating point arithmetic co-processor. Besides, we also propose a dedicated DMA architecture design to support high speed AMBA based burst transfer to communicate between dedicated hardware modules and host processor. The proposed system has latency less than 1 ms (<; 4ms) and 12 ms processing delay. The MSE is only 0.0089%. Therefore, the system can work in real-time and many clock cycles are still available for future algorithm improvement.