An architecture for the direct execution of the Forth programming language
J. R. Hayes, Martin E. Fraeman, Robert L. Williams, Thomas Zaremba · ACM SIGPLAN Notices · 1987
We have developed a simple direct execution architecture for a 32 bit Forth microprocessor. The processor can directly access a linear address space of over 4 gigawords. Two instruction types are defined; a subroutine call, and a user defined microcode instruction. On-chip stack caches allow most Forth primitives to execute in a single cycle.