Goals and tradeoffs in the design of the MC68881 floating point coprocessor
Joel Boney · AFIPS conference proceedings · 1984
This paper describes the goals and tradeoffs in the design of the MC68881 Floating Point Coprocessor. The Motorola MC68881 is a complete implementation of the proposed IEEE floating point standard on a single VLSI chip. It is a coprocessor for the MC68020 microprocessor and is a peripheral processor for other M68000 family processors.