A VLSI Architecture for Video Coding Based on PDVQ
Yumin Liao, Ningmei Yu, Wang Dong-fang · 2007 International Symposium on Integrated Circuits · 2007
In this paper, we propose a algorithm for video encoding based on partition dynamically vector quantization (PDVQ), and a VLSI architecture for implementing it. The proposed algorithm consists of PDVQ and motion estimation based on PDVQ. In addition to get a high compression ratio, the algorithm also reduces the memory size for restoring the reference frame. The implementation was verified in FPGA, It can support real-time application of 720times576 pels at 25 fps when the operation rate is 80 MHz.