Improving Analog and RF Device Yield through Performance Calibration
Nathan Kupp, He Huang, Yiorgos Makris, Petros Drineas · IEEE Design & Test of Computers · 2010
As the semiconductor industry continues scaling devices toward smaller process nodes, maintaining acceptable yields despite process variations has become increasingly challenging. Analog and RF circuits are particularly sensitive to process variations. This article discusses the challenges of cost-effective postfabrication performance calibration in such analog and RF devices and introduces a single-test, single-tuning-step method to constrain cost and complexity while reaping the benefits of a tunable design.