Low Latency Systolic Montgomery Multiplier for Finite Field $GF(2^{m})$ Based on Pentanomials
Jiafeng Xie, Jian jun He, Pramod Kumar Meher · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2012
In this paper, we present a low latency systolic Montgomery multiplier over$GF(2^{m})$based on irreducible pentanomials. An efficient algorithm is presented to decompose the multiplication into a number of independent units to facilitate parallel processing. Besides, a novel so-called “pre-computed addition” technique is introduced to further reduce the latency. The proposed design involves significantly less area-delay and power-delay complexities compared with the best of the existing designs. It has the same or shorter critical-path and involves nearly one-fourth of the latency of the other in case of the National Institute of Standards and Technology recommended irreducible pentanomials.