The development of FPGA architectures for primitive operator digital filter implementations
Tughrul Arslan · 1996
An architecture for a primitive operator FPGA is proposed in this paper. The performance of two CALB architectures, CALB1 and CALB2, has been investigated in terms of their operation speed and chip area. The CALB 1 architecture offers the advantage of faster speed of operation whereas the CALB2 architecture offers the advantage of reduced chip area. (6 pages)