A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs.
Jingzhao Ou, Viktor K. Prasanna · 2004
Abstract — Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platform FPGAs, part of it can be executed using hardware implementations on FPGA or software implementations on processor core(s). As the connection between different components on the devices are realized using FPGA routing resources, the designer has many choices for configuring the hardware components to execute the software. We show that these design choices have profound impact on the energy performance of the software programs. We propose a hybrid design approach for energy efficient application synthesis on platform FPGAs. It consists of a bottom-up process which performs simulation based performance modeling, and a top-down process which performs analytical performance optimization. The execution of an FFT software program on a state-of-the-art platform FPGA under various hardware choices is used to illustrate the bottom-up process. For the topdown process, we map an beamforming application onto hardware and software components based on the results from the bottom-up process. Energy reduction up to 46 % is observed for the beamforming application using the proposed design approach. I.