The design of a hardware recognizer for utilization in scanning operations
Ali R. Hurson, S. Shirazi · 1985
This paper addresses the design issues and the performance evaluation of a special purpose hardware recognizer device capable of performing pattern matching and text retrieval operations. In addition, the VLSI design and the time and space complexities of the proposed organization are discussed. The structure of the system is based on the concept of the non-deterministic finite state model with a high degree of parallelism incorporated into the design. The system simulates a parallel finite state automaton by utilizing a number of identical units called “CELLs” which have associative processing capabilities.