Guess, solder, measure, repeat
Geoffrey Ying, Andreas Kuehlmann, K. Kundert, Georges E. Gielen, E. Grimme, Martin O'Leary, Sandeep Tare, Warren Wong · 2009
Over the past 20 years, EDA has developed a solid digital implementation methodology that combines some restrictions on the design style with a set of comprehensive tools leading to predictable design flows. The recent increased use of analog components in complex SOC designs triggered a set of verification challenges ranging from simple connectivity problems to complex interferences between analog and digital data blocks. This panel discusses the state of the affairs in analog-mixed signal verification and draws a picture of future directions in terms of new approaches and tools.