Error-correcting codes for semiconductor memories
C. L. Chen · ACM SIGARCH Computer Architecture News · 1984
article Error-correcting codes for semiconductor memories Share on Author: C. L. Chen International Business Machines Corporation, P.O. Box 390, Department D18, Building 707, Poughkeepsie, NY International Business Machines Corporation, P.O. Box 390, Department D18, Building 707, Poughkeepsie, NYView Profile Authors Info & Claims ACM SIGARCH Computer Architecture NewsVolume 12Issue 3June 1984 pp 245–247https://doi.org/10.1145/773453.808190Published:01 January 1984 2citation972DownloadsMetricsTotal Citations2Total Downloads972Last 12 Months12Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access