A joined architecture/compiler design environment for ASIPs
Jürgen Teich, Ralph Weper, Dirk Fischer, Stefan Trinkert · 2000
In this paper, we introduce a methodology for rapid prototyping of application-speci c instruction set processors (ASIPs) including the automatic generation of bit-true and cycle-accurate instruction-set simulators and corresponding compiler (re)targets.The methodology is based on ASMs (abstract state machines) as the underlying formal model for describing a processor's behavior.We explain the major advantages of using ASMs and outline the main tool ow f r o m graphical entry of a processor's major RTL building blocks and simulator generation as well as the current status of our project.