Multiple-valued pads for binary chips
Antonio J. Acosta, M. Valencia, A. Barriga, J.L. Huertas, M.J. Bellido · Electronics Letters · 1992
A family of CMOS multiple-valued (MV) pads is presented. The most prominent advantage of these pads is the area gain (40–50%) if they are compared with the corresponding binary pads. Other features are low power consumption and high fanout. This family can be used in chips with very high pinout requirements, decreasing the complexity of the interconnections at board level.