A scheduling method for instruction-level parallel processing of vector and scalar instructions
Takuya Nakaike, Takehito Sasaki, Masayuki Katahira, Hiroaki Kobayashi, Tadao Nakamura · Systems and Computers in Japan · 1999
Jetpipeline is an architecture where fast computation is realized by combining vector processing and instruction-level parallel processing. Consequently, in order to utilize fully the potential performance of Jetpipeline, it is necessary to increase the vectorization ratio and to extract as many parallel executable instructions as possible. In Jetpipeline, the parallel executable instructions are extracted from code composed of mixed vector and scalar instructions. The vector instruction requires a larger number of execution cycles than the scalar instruction, and it is difficult to apply directly the parallelization techniques used in VLIW and other computers. This study seeks to extract fully the performance of Jetpipeline and proposes a parallelization method by effectively combining the vector and scalar instructions. The effectiveness of the method is verified by simulation. © 1999 Scripta Technica, Syst Comp Jpn, 30(13): 23–33, 1999