A novel methodology for testing hardware security and trust exploiting On-Chip Power noise Measurement
Daisuke Fujimoto, Makoto Nagata, Shivam Bhasin, Jean‐Luc Danger · 2015
For security-critical applications, the security and trust of devices must be tested before shipping. In this paper, we promote the use of On-Chip Power noise Measurements (OCM), in order to test security using side-channel techniques. We then propose for the first time a standard side-channel measurement setup using OCM. Finally, we provide some key ideas on methodology to integrate the validation of hardware security and trust in the standard testing flow, exploiting OCM.