An aggressive power optimization of the ARM9-based core using RAZOR
Mark Earvin V. Alba, Adelson N. Chua, Wes Vernon V. Lofamia, Rico Jossel Maestro, John Richard E. Hizon, Joy Alinda R. Madamba, Hadrian Renaldo O. Aquino, Louis P. Alarcón · 2012
With the increasing popularity of mobile and energy-limited devices, the trend in the field of microprocessor design has shifted from high performance to low power operation. A common low power technique is reducing the supply voltage during periods of low utilization. However, this is limited by the safety margins needed to protect the processor from infrequent voltage glitches and environmental noise. On the other hand, as long as all errors can be detected and recovered, a considerable amount of energy can be saved.