Synchronous elastic circuits with early evaluation and token counterflow

Jordi Cortadella, Michael Kishinevsky · Proceedings - ACM IEEE Design Automation Conference · 2007

A protocol for latency-insensitive design with early evaluation is presented. The protocol is based on a symmetric view of the system in which tokens carrying information move in the forward direction and anti-tokens canceling information move in the backward direction. An implementation of the protocol and an example illustrate the flow for converting a regular synchronous design into an elastic circuit with early evaluation.

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