Functional verification methodology for microprocessors using the Genesys test-program generator
Laurent Sébastien Fournier, Yaron Arbetman, Moshe Levinger · 1999
Article Functional verification methodology for microprocessors using the Genesys test-program generator Share on Authors: Laurent Fournier IBM Haiga Research Lab IBM Haiga Research LabView Profile , Yaron Arbetman IBM Haiga Research Lab IBM Haiga Research LabView Profile , Moshe Levinger IBM Haiga Research Lab IBM Haiga Research LabView Profile Authors Info & Claims DATE '99: Proceedings of the conference on Design, automation and test in EuropeJanuary 1999 Pages 92–eshttps://doi.org/10.1145/307418.307540Published:01 January 1999 39citation271DownloadsMetricsTotal Citations39Total Downloads271Last 12 Months0Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access