Register-transfer level deductive fault simulation using decision diagrams
Uljana Reinsalu, Jaan Raik, Raimund Ubar · 2010
The paper presents a deductive method for register-transfer level fault simulation on the system model of high-level decision diagrams. The method is based on the bit coverage fault model, which has been proven to have a good correspondence with gate-level structural faults. Experiments on ITC99 benchmark circuits have been carried out showing the feasibility of the proposed approach.