Generating test patterns for VLSI circuits usinga geneticalgorithm
M.J. O'Dare, Tughrul Arslan · Electronics Letters · 1994
The authors present the development of a technique that uses genetic algorithms, for the generation of test patterns that detect single stuck-at faults in combinational VLSI circuits. As the genetic algorithm evolves, an efficient set of test patterns are produced, by searching the solution space for patterns that detect the highest number of remaining faults in the fault list.