Programmable real-time FIR-filter logic device
Eduardo Boemo, Fernando Barbero, J. Faura, J. Jauregui, Juan Meneses · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 1995
This paper resumes the development of an integrate tool for designing high-speed, real-time, FIR-filter circuits. The system is composed of programmable IC and an associate software for filter repsonse analysis, synthesis of coefficients, and circuit programming. The architecture is highly regular, easily expandable and its control is distributed. The chip can be programmed by a PC or by using an EPROM. The prototypes have been fabricated using the CMOS 1.5micrometers Standard Cell of ES2. Moreover, some heuristics about multipliers upgrated to CMOS 1micrometers - Cadence DFWII are resumed.