Realisation of soft morphological filters
Antonios C. Gasteratos, Ioannis Th. Andreadis, Ph. Tsalides · IEE Proceedings - Circuits Devices and Systems · 1998
A new technique for the realisation of soft morphological filters based on the majority gate algorithm is presented. A pipelined systolic array architecture suitable to perform soft morphological filtering is also presented. The processing times of the proposed hardware structure do not depend on the data window size and the required silicon area is linearly related to the number of its inputs and the image resolution.