Compiler-directed frequency and voltage scaling for a multiple clock domain microarchitecture
Arun Rangasamy, Rahul Nagpal, Y. N. Srikant · 2008
Multiple Clock Domain processors provide an attractive solution to the increasingly challenging problems of clock distribution and power dissipation. They allow their chips to be partitioned into different clock domains, and each domain's frequency (voltage) to be independently configured. This flexibility adds new dimensions to the Dynamic Voltage and Frequency Scaling problem, while providing better scope for saving energy and meeting performance demands.