Towards a time-triggered schedule calculation tool to support model-based embedded software design
Joseph E. Porter, Gábor Karsai, János Sztipanovits · 2009
Time-triggered architectures (TTA) provide replica determinism in safety-critical distributed embedded software designs. TTA has become a crucial part of many high-confidence embedded paradigms, as it decouples functional concerns from platform timing concerns in system designs. Complex embedded software development workflows for safety-critical applications are increasingly managed by model-based design tools, in order to support automated verification and reconcile conflicts between functional and non-functional concerns in designs. We present a prototype scheduling tool (ESched) which calculates cyclic schedules for time-triggered networks. ESched supports the model-based workflow of the ESMoL modeling language and tool suite. Using ESMoL, designers can rapidly iterate through simulating a control design, capturing platform effects in models, generating a schedule (if feasible), and re-simulating the control design subject to the platform model and the computed schedule. ESched specifications include a number of useful platform parameters, and it supports troubleshooting of infeasible schedules by allowing the user to specify partial platform models to solve.