Data type analysis for hardware synthesis from object-oriented models
Martin Radetzki, Ansgar Stammermann, Wolfram Putzke-Röming, Wolfgang H. Nebel · 1999
Object-oriented modeling of hardware promises to help deal with design complexity through higher abstraction and better support for reuse. Whereas simulation of such models is rather easy to achieve, synthesis turns out to require the application of quite sophisticated techniques. In this paper, we devise a solution of the foremost problem, optimized synthesis of object-oriented data types. The outlined algorithms have been implemented for an object -oriented dialect of VHDL and may also contribute, possibly in a co-design context, to synthesis from languages such as C++ or Java. We explain our synthesis methods and show their impact with the example of a microprocessor model. 1 Introduction The need to keep productivity up with the growing complexity of hardware units under design has been and continues to be among the most pressing design methodology issues. It has been effectively addressed by design at ever-higher abstraction, from gate via register-transfer to behavioral level, ...