PIFO Output Queued Switch Emulation by a One-cell-Crosspoint Buffered Crossbar Switch
Han Qiu, Yufeng Li, Peng Yi, Jiangxing Wu · 2006
It is well known that the buffered crossbar has simpler scheduling algorithms than an unbuffered crossbar. Buffered crossbar can be pipelined to run at a high speed, making it appealing for high performance switches and routers. Recent researches indicate that a buffered crossbar with modest speedup can exactly emulate an output queued (OQ) switch. As for per flow/priority guarantee, additional speedup and storage is required to avoid crosspoint blocking, preventing the use of the buffered crossbar for lager-scale devices. This paper introduces a novel mechanism to solve crosspoint blocking and a simple architecture to provide per flow/priority guarantee. Based on a simple scheduling scheme, named modified group-by-first-in-first-out-group-Lowest Time-to-Leave (MGBFG-LTTL), we sufficiently prove that a one-cell-crosspoint buffered crossbar with input Virtual Priority Output Queues, VPOQ/CB-1, switch with two times speedup can exactly emulate a push-in-first-out (PIFO) OQ switch. Our scheme has less hardware requirements and provides a simple path to scale crossbar based routers.