An asynchronous array of simple processors for dsp applications
Zhiyi Yu, Michael J. Meeuwsen, Ryan W. Apperson, Omar Sattari, Michael Lai, Jeremy W. Webb, Eric W. Work, Tinoosh Mohsenin, Montek Singh, Bevan M. Baas · 2006
An array of simple programmable processors designed for DSP applications is implemented in 0.18μm CMOS and contains 36 asynchronously clocked independent processors. The processors operate at 475MHz, and each processor has a maximum power of 144mW at 1.8V and occupies 0.66 mm2