Improved performance and resource usage of FPGA using resource-aware design; the case of a decimal array multiplier
Adel Hosseiny, Saba Amanollahi, Reza Hashemi, Ali Jahanian · 2013
Awareness of the available resources in FPGA platform can improve the quality of the hardware design. Decimal array multipliers due to their regular nature and compatibility with the CLB structure of FPGA platform are suitable cases to this aim. In this paper, PPG unit of a decimal multiplier has been realized using two different approaches in order to improve utilization of the FPGA resources.