True swap gate design for on chip cache organization megabit bubble memory
Hiroki Kohara, Kunimasa Takahashi, S. Suga, Shinji Fujiwara · IEEE Transactions on Magnetics · 1981
A highly reliable true swap gate for on chip cache organization megabit chip has been developed, which was designed to swap bubble strings between cache and storage by controlling current in a single conductor pattern. This gate consists of two pairs of transfer gate and merge to match 7 μm period folded minor loop. The gate conductor was improved so as not to block the bubble propagation by the swap out current during the continuous operation. The results in actual 1 Mb chips showed a wide margin of 22 Oe, reliable operation with a 15 mA gate current, 55 Oe to 65 Oe sinusoidal rotating field drive at 125 kHz, 0° to 75° C temperature and less margin loss of 2.0 Oe on the constant order swap mode operation, which eased bubble controller for on chip cache organization.