A microprogrammable real-time video signal processor (VSP) for motion compensation
M. Yamashina, Tadayoshi Enomoto, T. Kunio, Ichiro Tamitani, Hidenobu Harasaki, Yukio Endo, T. Nishitani, M. Satoh, Koichi Kikuchi · IEEE Journal of Solid-State Circuits · 1988
A video signal processor (VSP) LSI circuit with a three pipelined architecture has been developed for pattern matching, which is fundamental for the motion compensation necessary for teleconferencing systems. A high-speed arithmetic logic unit with absolute-value calculation capability and a minimum/maximum value detector, which are essential to pattern matching, have been integrated on the VSP LSI. The chip was fabricated with a 2.5- mu m CMOS and double-layer metallization technology. The number of MOSFETs integrated on the 9.91*9.50-mm/sup 2/ chip is about 48000. It operates at a 14.3-MHz clock frequency with a single 5-V power supply and typically consumes 240 mW. An experimental video signal processing system, using a single VSP LSI chip, is discussed.>