Analytical computation of packet latency in a 2D-mesh NoC
Sahar Foroutan, Yvain Thonnart, Richard Hersemeule, Ahmed Amine Jerraya · 2009
In order to avoid time-consuming iterations in the design flow of system-on-chip communication, it is required to make early decisions based on the performance estimations of the system. To fulfill such requirements, analytical techniques are fast and reliable alternatives for long and non-exhaustive traditional simulation-based methods. This paper presents a case-study of using an analytical method, based on Markov chain stochastic processes, for latency evaluation of a Network-on-Chip arranged in a two dimensional Mesh topology, with an x-first routing algorithm and an uniform traffic pattern. Results obtained by the analytical method are compared with the results of a SystemC simulation platform.