Analysis and Evaluation of Routing BIST Approaches for FPGAs
Bobby Dixon, Charles E. Stroud · 2007
Abstract: We present stuck-at and bridging fault simu-lation results for previously proposed Built-In Self-Test (BIST) approaches for the programmable interconnect resources in Field Programmable Gate Arrays (FPGAs). In addition, new BIST approaches are proposed and analyzed via fault simulation. The fault simulation re-sults are used to compare and evaluate the fault detec-tion capabilities and effectiveness of these BIST ap-proaches for testing routing resources in FPGAs.1 1.