A comparison of adiabatic logic as a countermeasures against power analysis attacks
Yasuhiro Takahashi, Toshikazu Sekine, Michio Yokoyama · 2010
This paper investigates the possibility of using adiabatic logic as a countermeasure against power analysis attacks. As the examples of adiabatic logic styles, we evaluate single- and dual-rail gates that are driven a single sinusoidal power clock. From simulation results, we conclude that adiabatic logic countermeasures, such as the single-rail logics, seem to be promising candidates, because they increase the resistance against power analysis attacks while at the same time lowering the power consumption of the pervasive device.