Cost-effective speculative scheduling in high performance processors
Arthur Pérais, André Seznec, Pierre Michaud, Andreas Sembrant, Erik Hägersten · 2015
To maximize performance, out-of-order execution processors sometimes issue instructions without having the guarantee that operands will be available in time; e.g. loads are typically assumed to hit in the L1 cache and dependent instructions are issued accordingly. This form of speculation -- that we refer to as speculative scheduling -- has been used for two decades in real processors, but has received little attention from the research community.