Implementing Interval Type-2 Fuzzy Processors [Developmental Tools]
Miguel Melgarejo, Carlos Andrés Peña-Reyes · IEEE Computational Intelligence Magazine · 2007
This article discusses some relevant methodological aspects for implementing IT2-FLS on hardware. First it describes a hardware architecture for an IT2-FP. In addition, it details particular considerations for the design of the different components of the architecture. As a study case, a simple implementation of an IT2-FP in FPGA technology is presented