CMOS stuck-open fault testability
Rochit Rajsuman, Yashwant K. Malaiya, Anura P. Jayasumana · IEEE Journal of Solid-State Circuits · 1989
CMOS combinational circuits exhibit sequential behavior in the presence of open faults, thus making it necessary to use two-pattern tests. An example which illustrates how such tests can be invalidated by glitches induced by circuit delays is presented. It is also shown that some results recently reported by researchers may not be valid in the presence of glitches.>