Design of compact CN delay-based PUFS in 65nm CMOS
Yuejun Zhang, Pengjun Wang, Jianrui Li, Gang Li · 2014
Physical Unclonable Functions (PUFs) exploit the statistical variation of CMOS circuit during manufacture process to generate unclonable secret data. In the paper, compact C2ndelay-based PUFs (C2n-PUFs) is designed in TSMC 65nm CMOS technology. After configuring the delay-paths, C2n-PUFs build different data without circuit replace. C2ncombination method exponential decreases the number of delay path with keeping the output data bits. In custom designed, the area of 128-bit C2n-PUFs is 30 × 147μm2. Experimental results show that the C2n-PUFs have reliability and randomness features, and improve information density about 89.6%.