Floating Gate super multi level NAND Flash Memory Technology for 30nm and beyond
T. Kamigaichi, Fumitaka ARAI, H. Nitsuta, Masamori Endo, K. Nishihara, Takaaki Murata, H. Takekida, T. Izumi, Ken Uchida, Toru Maruyama, I. Kawabata, Yoshihiro Suyama, Akira Sato, Kazuki Ueno, H. Takeshita, Y. Joko, S. Watanabe, Y. Liu, H. Meguro, Akihiro Kajita · 2008
A floating gate NAND flash memory technology for 30 nm and beyond has been successfully developed. Wide program/erase window, tight natural threshold voltage (Vth) distribution, and good cell reliabilities such as program disturb, program/erase endurance and data retention are successfully demonstrated, which are essential to realize super MLC.