Post-layout verification of the WE DSP32 digital signal processor
L.E. Bays, Chin-Fu Chen, E.M. Fields, Renato N. Gadenz, W. Patrick Hays, Howard S. Moscovitz, Thomas G. Szymanski · IEEE Design & Test of Computers · 1989
The authors describe the successful postlayout verification of the WE DSP32 digital signal processor and the application of advanced CAD (computer-aided design) tools. The development work culminated in the smooth transfer of the DSP32 design into high-volume production. During this period, the authors were able to diagnose and repair hundreds of design errors. They also caught errors in the test-vector software and fixed them before first silicon. They estimate that their verification work saved the DSP32 project a year of silicon debugging. In addition, the authors were able to enhance the CAD tools themselves.>